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SMT topics in focus


SMT topics in focus

Advanced Packaging for Automotive - ASMPT

Advanced Packaging

Advanced packaging means combining dies and SMT components into system-in-package (SiP) applications, embedding them in substrate cavities (embedded PCB), or the contacts of dies spreading out the contacts of dies via wafer-level-fan-out (WLFO) or panel-level-fan-out (PLFO) processes. The goal is to pack more functions into an ever-smaller space with the fastest time to market.

As the demand increases for increasingly smaller IoT devices, sensors, power modules and medical devices, more manufacturers and industries are discovering the potential of this technology – and subsequently want more performance and productivity from their manufacturing equipment. This is where we at ASMPT come into play with our portfolio of advanced packaging solutions.

Solutions for Advanced Packaging in Electronics Production

New applications in electronics drive advances in miniaturization, component density and modularization while the pressure on costs keeps rising. In response, semiconductor makers and contract manufacturers resort more and more to advanced packaging technologies like fan-out wafer level and fan-out panel level packaging (FOWL/FOPLP), these formats are increasingly combined with 3D and SiP technologies. This permits them to develop microelectronics with more functional density as well as outstanding electrical and thermal properties. Advanced packaging technologies are extremely complex and demand manufacturing methods with exceptional precision in all process steps. Close control and optimization of all parameters ensure that quality and yield rates can be brought up to the required levels even in high volume environments. The only way to accomplish this is with manufacturing equipment that‘s equally precise and efficient.


"Data is the new oil" so they say and thus there are new demands on electronics for data collection, communication, and analysis. The basis for the communication lies in the 5G mobile data network that is currently under construction, and the many devices must have powerful and highly miniaturized communication modules installed.

This degree of integration is achieved by combining many heterogeneous active and passive components into an SiP (system-in-a-package) with technologies like active embedding or multi-layered, three-dimensional structures. To enable this process ASMPT offers a wide range of different die & flip chip bonders to meet any of your packaging requirements: From Highest Speed Chip and SMD placement, like the SIPLACE TX micron, sub-micron die bonding, like the AMICRA NANO or even precise die & flip chip bonders.


Miniaturization and modularization, two major trends in Semiconductor packaging continues to be the main driving force to meet the need of a new generation of devices stemming from the introduction of 5G, Internet of Things, and other mobile devices. Advanced packaging technologies, such as embedded dies, which can be processed in large panels that incorporates embedded devices - both passives and active dies, have emerged as the solution to meet the requirement for greater flexibility, faster time to market, and lower costs.

SIPLACE CA2 (Chip Assembly) is the universal SiP placement platform from ASMPT. It can process large and thin substrates as well as place a wide variety of components in the tightest of spaces. The hybrid machine processes dies directly from the waver as well as taped standard SMDs. It achieves a speed level that enables seamless integration into existing high-speed SMT production lines. With the SIPLACE CA2, SMT manufacturers are ideally equipped for the expected growth in integrated modules with higher performance, extended functionality and ever thinner form factors.


Back-end packaging and SMT production used to be two strictly separate production areas - which are now gradually merging in advanced packaging. This opens up the attractive growth market of ultra-compact SMT function modules not only for OSATs, but also for electronics manufacturers who want to differentiate themselves. They can support the semiconductor industry with their high-speed lines in order to satisfy the exploding demand for SiP.

Hybrid placement platforms such as SIPLACE CA2 are ideal for this: they can combine bare dies with SMT components at both wafer and panel level - without any loss of performance in high-speed production. In addition to die & flip chip bonding, ASMPT also offers a complete process solution for the assembly of wafer-level packages - from chip placement to inspection, sorting and taping of the components.

Power Modules

More functionalities requires more power and frequently changing loads and high temperatures cause conductive connections in power electronics to age quickly. One solution to this problem involves temperature-resistant materials such as nano-silver pastes.

The solution: With silver sintering, nano-silver particles can be shaped to form stable connections without melting. The DEK Galaxy can easily deposit silver paste and when combined with other ASMPT solutions for silver sintering, die-attach and wire bonding, component manufacturers can produce more durable IGBTs with improved electrical and thermal properties.

Automobile Industry: The driver of new processes

Electric cars, autonomous driving – the automobile industry depends on state-of-the-art electronics with advanced packaging technology at their center.

Experience more


Today, ASMPT can offer our customers a broad and flexibly scalable portfolio of solutions for advanced packaging. Together with our customers, ASMPT defines their respective process and accuracy requirements and considers the potential options in terms of production capacity.



High Speed and Large Panel Die/SMD Bonding

  • Accuracy: +/- 10µm @ 3σ (local alignment)
  • SMT up to 76,000 cph
  • Flip chip from wafer up to 40,000 cph
  • Die attach from wafer up to 50,000 cph
  • Up to 685x650mm substrate handling
  • Combining Wafer, Tape & Reel and Trays in a single platform


Placement of passive components and bare dies from tape

  • Combination of Die and SMD placement in single pass
  • Accuracy: +/- 15µm @ 3σ (local alignment)
  • Up to 96,000 components per hour
  • Clean room ISO 7 certified as standard

DEK Galaxy

Placement of passive components and bare dies from tape

  • Highest print accuracy platform 2.0Cpk repeatability @ ± 12.5μm
  • High accuracy applications at wafer, substrate and board level
  • Fastest Printing platform at 7 sec


ORCAS is designed to encapsulate large substrate formats

  • Up to 12” Wafer
  • Panels with upto 340mmx340mm
  • Die-up or die-down
  • Overmolding
  • Keep-out-zone molding

ALSI Laser1205

Multi-beam laser dicing of SiC wafers at extremely low thermal impact while having very high productivity

  • High laser spot flexibility (>30 types of spot patterns/DOE offered)
  • Fast changing to selected DOE’s incl. orientation check
  • Accurately laser power changes incl. power and spot position check
  • Highly accurate (wafer)slider position during process (+/-1.5µm)
  • Capability to process broken wafer and partials


Silver sintering single platform that can be used both in R&D activities and a multi-press configuration for running high-volume production with pressure sintering applications

  • Expandable from 1-3 presses
  • Individual controlled press
  • Fully automated material handling

Best-in-class solutions

As the industry’s technology leader, ASMPT offers a broad portfolio of best-in-class products. Our solutions stand out with their perfect interaction of hardware, software and service components – powerful, smart, and ready to raise your production to a new level.

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